®OPA177OPA177OPA177PrecisionOPERATIONAL AMPLIFIERFEATURESqLOW OFFSET VOLTAGE: 25µV maxqLOW DRIFT: 0.3µV/°CqHIGH OPEN-LOOP GAIN: 130dB minqLOW QUIESCENT CURRENT: 1.5mA typqREPLACES INDUSTRY-STANDARD OPAMPS: OP-07, OP-77, OP-177, AD707,ETC.APPLICATIONSqPRECISION INSTRUMENTATIONqDATA ACQUISITIONqTEST EQUIPMENTqBRIDGE AMPLIFIERqTHERMOCOUPLE AMPLIFIERDESCRIPTIONThe OPA177 precision bipolar op amp feature verylow offset voltage and drift. Laser-trimmed offset,drift and input bias current virtually eliminate the needfor costly external trimming. The high performanceand low cost make them ideally suited to a wide rangeof precision instrumentation.The low quiescent current of the OPA177 dramati-cally reduce warm-up drift and errors due to thermo-V+7Trim114kΩTrim8electric effects in input interconnections. It providesan effective alternative to chopper-stabilized amplifi-ers. The low noise of the OPA177 maintains accuracy.OPA177 performance gradeouts are available. Pack-aging options include 8-pin plastic DIPand SO-8 surface-mount packages.25ΩV O630Ω+In3500Ω–In2500Ω20µAV–4International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 • Twx: 910-952-1111Internet: http://www.burr-brown.com/ • FAXLine: (800) 548-6133 (US/Canada Only) • Cable: BBRCORP • Telex: 066-91 • FAX: (520) 8-1510 • Immediate Product Info: (800) 548-6132©
1990 Burr-Brown CorporationPDS-1081EPrinted in U.S.A. August, 1997
OPA177 SPECIFICATIONS
At VS = ±15V, TA = +25°C, unless otherwise noted.
OPA177F
PARAMETER
OFFSET VOLTAGEInput Offset Voltage
Long-Term Input Offset(1) Voltage Stability
Offset Adjustment Range
Power Supply Rejection RatioINPUT BIAS CURRENTInput Offset CurrentInput Bias CurrentNOISE
Input Noise VoltageInput Noise CurrentINPUT IMPEDANCEInput Resistance
INPUT VOLTAGE RANGECommon-Mode Input Range(4)Common-Mode RejectionOPEN-LOOP GAIN
Large Signal Voltage GainOUTPUT
Output Voltage Swing
1Hz to 100Hz(2)1Hz to 100HzDifferential Mode(3)Common-Mode
26
CONDITION
MIN
TYP100.3
RP = 20kΩVS = ±3V to ±18V
±31250.30.5854.545200±1414012,000±14±13±12.5600.30.03.51.3
604.521.5±2150MAX25
MIN
OPA177GTYP200.4T120TTTT
18.5
TTTT6000TTTTTTTTT
TTT2.8±2.8TMAX60
UNITSµVµV/MomVdBnAnAnVrmspArmsMΩGΩVdBV/mVVVVΩV/µsMHzmWmWmA
115110
VCM = ±13VRL ≥ 2kΩVO = ±10V(5)RL ≥ 10kΩRL ≥ 2kΩRL ≥ 1kΩ
±131305110±13.5±12.5±12
T1152000TTT
Open-Loop Output ResistanceFREQUENCY RESPONSESlew Rate
Closed-Loop BandwidthPOWER SUPPLYPower ConsumptionSupply Current
RL ≥ 2kΩG = +1VS = ±15V,NoLoadVS = ±3V, No LoadVS = ±15V,NoLoad
0.10.4
TT
At VS = ±15V, –40°C ≤ TA ≤ +85°C, unless otherwise noted.OFFSET VOLTAGEInput Offset VoltageAverage Input Offset Voltage Drift
Power Supply Rejection RatioINPUT BIAS CURRENTInput Offset Current
Average Input Offset Current Drift(6)
Input Bias Current
Average Input Bias Current Drift(6)
INPUT VOLTAGE RANGECommon-Mode Input RangeCommon-Mode RejectionOPEN-LOOP GAIN
Large Signal Voltage GainOUTPUT
Output Voltage SwingPOWER SUPPLYPower ConsumptionSupply Current
T Same as specification for product to left.
NOTES: (1) Long-Term Input Offset Voltage Stability refers to the averaged trend line of VOS vs time over extended periods after the first 30 days of operation. Excludingthe initial hour of operation, changes in VOS during the first 30 operating days are typically less than 2µV. (2) Sample tested. (3) Guaranteed by design. (4) Guaranteedby CMRR test condition. (5) To insure high open-loop gain throughout the ±10V output range, AOL is tested at –10V ≤ VO ≤ 0V, 0V ≤ VO ≤ +10V, and –10V ≤ VO ≤ +10V.(6) Guaranteed by end-point limits.
±131202000±12
150.1
VS = ±3V to ±18V
110
1200.51.50.58
2.240±440400.3
106
200.7115TTT15
4.585±6601001.2
µVµV/°CdBnApA/°CnApA/°C
VCM = ±13VRL≥2kΩ, VO=±10V
RL ≥ 2kΩVS=±15V,NoLoadVS=±15V,NoLoad
±13.51406000±13602
7525
T1101000T
TT4000TTT
TT
VdBV/mVVmWmA
®OPA177
2
PIN CONFIGURATION
Top View
DIP/SOIC
ABSOLUTE MAXIMUM RATINGS
Power Supply Voltage.......................................................................±22VDifferential Input Voltage...................................................................±30VInput Voltage.......................................................................................±VSOutput Short Circuit.................................................................ContinuousOperating Temperature:
Plastic DIP (P), SO-8 (S)..............................................–40°C to +85°CθJA (PDIP).................................................................................100°C/WθJA (SOIC).................................................................................160°C/WStorage Temperature:
Plastic DIP (P), SO-8 (S)............................................–65°C to +125°CJunction Temperature....................................................................+150°CLead Temperature(soldering, 10s) P packages...........................+300°C
(soldering, 3s) S package...............................+260°C
Offset Trim–In+InV–12348765Offset TrimV+VONo Internal ConnectionPACKAGE/ORDERING INFORMATION
PACKAGEDRAWINGNUMBER(1)
006006182
TEMPERATURE
RANGE–40°C to +85°C–40°C to +85°C–40°C to +85°C
PRODUCTOPA177FPOPA177GPOPA177GS
PACKAGE8-Pin Plastic DIP8-Pin Plastic DIPSO-8 Surface-Mount
ELECTROSTATICDISCHARGE SENSITIVITYAny integrated circuit can be damaged by ESD. Burr-Brownrecommends that all integrated circuits be handled withappropriate precautions. ESD can cause damage rangingfrom subtle performance degradation to complete devicefailure. Precision integrated circuits may be more suscep-tible to damage because very small parametric changescould cause the device not to meet published specifications.Burr-Brown’s standard ESD test method consists of five1000V positive and negative discharges (100pF in serieswith 1.5kΩ) applied to each pin.
Failure to observe proper handling procedures could resultin small changes to the OPA177’s input bias current.
NOTE: (1) For detailed drawing and dimension table, please see end of datasheet, or Appendix C of Burr-Brown IC Data Book.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumesno responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to changewithout notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrantany BURR-BROWN product for use in life support devices and/or systems.
®3
OPA177
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15V, unless otherwise noted.
TOTAL HARMONIC DISTORTION AND NOISEvs FREQUENCY1A = 20dB, 3Vrms, 10kΩ load)%0.1( N + DHNoninvertingInvertingT0.0130kHz low pass filtered0.0011k10k100kFrequency (Hz)MAXIMUM VOUT vs IOUT
(Positive Swing)17.515VS = ±18V12.5V)S = ±15VV(10 TUO7.5VVS = ±12V52.5VS = ±15V0061218243036IOUT (mA)OFFSET VOLTAGE CHANGEDUE TO THERMAL SHOCK30Device Immersed in 70°C Inert Liquid25tupn)I Vnµ20i( eeggnaatlho15CV etteuslfof10sObPlastic DIPA5001020304050607080Time (s)®OPA177
MAXIMUM VOUT vs IOUT(Negative Swing)–17.5–15VS = ±18V–12.5VS = ±15V)V(–10V S = ±12VTUOV–7.5–5–2.5VS = ±15V00–2–4–6–8–10–12–IOUT (mA)WARM-UP OFFSET VOLTAGE DRIFT3)V2µ( egn1ahC eg0atloV t–1esffO–2–30153045607590105120Time from Power Supply Turn-On (s)CLOSED-LOOP RESPONSE vs FREQUENCY10080)Bd( n60iaG po40oL-des20olC0–20101001k10k100k1M10MFrequency (Hz)4
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
OPEN-LOOP GAIN/PHASE vs FREQUENCY1600140Gain)B12045)sde(e nia100rgeGD( po80Phase90 tfiohLS-n60 eespaO40135hP2001800.010.11101001k10k100k1MFrequency (Hz)POWER SUPPLY REJECTIONvs FREQUENCY150)Bd(130 noitceje110R ylppu90S rewoP70500.11101001k10kFrequency (Hz)TOTAL NOISE vs BANDWIDTH(0.1Hz to Frequency Indicated)10)Vµ1( esioN SMR0.10.011001k10k100kBandwidth (Hz)5
CMRR vs FREQUENCY150140130)Bd(120 RRM110C10090801101001k10k100kFrequency (Hz)INPUT BIAS AND INPUT OFFSET CURRENTvs TEMPERATURE)A2n( tnerruC1 tIBesffO tu0IpOSnI dna sa–1iB tupnI–2–40–1510356085Temperature (°C)INPUT NOISE VOLTAGE DENSITY vs FREQUENCY
1kR = R = 200kS1S2Ω)Thermal noise ofzHsource resistors√/Vincluded.n(100
egatloV esioN10
R = 0S tupnI11
10
1001k
10k
Frequency (Hz)
®OPA177
TYPICAL PERFORMANCE CURVES (CONT)
At TA = +25°C, VS = ±15V, unless otherwise noted.
MAXIMUM OUTPUT SWING vs FREQUENCY32G = +1)28V(R = 2k LΩed24utilp20mA k16aeP-o12t-kae8P401k10k100k1MFrequency (Hz)MAXIMUM OUTPUT VOLTAGE vs LOAD RESISTANCE20Positive)V15Output( tuptNegativeuOOutput m10umixaM501001k10kLoad Resistance to Ground ( )Ω®OPA177
POWER CONSUMPTION vs POWER SUPPLY100)Wm( noitpmus10noC rewoP1010203040Total Supply Voltage (V)OUTPUT SHORT-CIRCUIT CURRENT vs TIME40)Am( t35nerruC t30iucriC-tr25I +SCohS tupt20uI –OSC1501234Time from Output Being Shorted (min)6
APPLICATIONS INFORMATION
The OPA177 is unity-gain stable, making it easy to use andfree from oscillations in the widest range of circuitry. Ap-plications with noisy or high impedance power supply linesmay require decoupling capacitors close to the device pins.In most cases 0.1µF ceramic capacitors are adequate.The OPA177 has very low offset voltage and drift. Toachieve highest performance, circuit layout and mechanicalconditions must be optimized. Offset voltage and drift canbe degraded by small thermoelectric potentials at the op ampinputs. Connections of dissimilar metals will generate ther-mal potential which can mask the ultimate performance ofthe OPA177. These thermal potentials can be made to cancelby assuring that they are equal in both input terminals.1.Keep connections made to the two input terminals closetogether.2.Locate heat sources as far as possible from the criticalinput circuitry.3.Shield the op amp and input circuitry from air currentssuch as cooling fans.OFFSET VOLTAGE ADJUSTMENT
The OPA177 has been laser-trimmed for low offset voltageand drift so most circuits will not require external adjust-ment. Figure 1 shows the optional connection of an externalpotentiometer to adjust offset voltage. This adjustment shouldnot be used to compensate for offsets created elsewhere in asystem since this can introduce excessive temperature drift.INPUT PROTECTION
The inputs of the OPA177 are protected with 500Ω seriesinput resistors and diode clamps as shown in the simplifiedcircuit diagram. The inputs can withstand ±30V differentialinputs without damage. The protection diodes will, of course,conduct current when the inputs are overdriven. This maydisturb the slewing behavior of unity-gain follower applica-tions, but will not damage the op amp.
2VIN3V+18OPA17720kΩVOUTTrim Range is approximately ±3.0mVFIGURE 1. Optional Offset Nulling Circuit.
NOISE PERFORMANCE
The noise performance of the OPA177 is optimized forcircuit impedances in the range of 2kΩ to 50kΩ. Total noisein an application is a combination of the op amp’s inputvoltage noise and input bias current noise reacting withcircuit impedances. For applications with higher sourceimpedance, the OPA627 FET-input op amp will generallyprovide lower noise. For very low impedance applications,the OPA27 will provide lower noise.
INPUT BIAS CURRENT CANCELLATION
The input stage base current of the OPA177 is internallycompensated with an equal and opposite cancellation cur-rent. The resulting input bias current is the differencebetween the input stage base current and the cancellationcurrent. This residual input bias current can be positive ornegative.
When the bias current is cancelled in this manner, the inputbias current and input offset current are approximately thesame magnitude. As a result, it is not necessary to balancethe DC resistance seen at the two input terminals (Figure 2).A resistor added to balance the input resistances may actu-ally increase offset and noise.
R2R2R1Op AmpR1OPA177RB= R2|| R1No bias currentcancellation resistor needed(a)(b)Conventional op amp withexternal bias currentcancellation resistor.OPA177 with no externalbias current cancellationresistor.FIGURE 2. Input Bias Current Cancellation.
®7
OPA177
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