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专利名称：Method of forming an interconnect
structure for a semiconductor device
发明人：Yung-Hsu Wu,Cheng-Hsiung Tsai,Yu-Sheng
Chang,Chia-Tien Wu,Chung-Ju Lee,Yung-Sung Yen,Chun-Kuang Chen,Tien-I Bao,Ru-Gun Liu,Shau-Lin Shue
申请号：US15249805申请日：20160829公开号：US09997404B2公开日：20180612
专利附图：
摘要：Methods of semiconductor device fabrication are provided including those thatprovide a substrate having a plurality of trenches disposed in a dielectric layer formedabove the substrate. A spacer material layer is formed over the plurality of trenches. Avia pattern including a plurality of openings is formed over the spacer material layer andplurality of trenches. Via holes can be etched in the dielectric layer using the via patternand spacer material layer as a masking element.
申请人：Taiwan Semiconductor Manufacturing Company, Ltd.
地址：Hsin-Chu TW
国籍：TW
代理机构：Haynes and Boone, LLP
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