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专利名称：Test selection system
发明人：Dreibelbis, Jeffrey H.,Gabric, John
A.,Hedberg, Erik L.
申请号：EP90107291.8申请日：19900418公开号：EP0399207A2公开日：19901128
专利附图：
摘要：A test selection system is provided which includes a semiconductor substrate (S)having a pin (AX) connected thereto and an integrated circuit (M) disposed on thesubstrate (S) and connected to the pin (AX) having an operating voltage within a given
voltage range. A latch conditioning circuit (12) having an input responsive to a voltage of agiven magnitude has an output (NB) connected to a latch (14), and a voltage controlcircuit (10) operable at a voltage without the given voltage range selectively applies acontrol voltage of the given magnitude to the input of the latch conditioning circuit (12).A voltage without the given voltage range is applied to the pin (AX) during a first intervalof time to produce the control voltage for establishing a test mode and a voltage withinthe given voltage range is applied to the pin (AX) during a second interval of time toestablish a normal operating mode for the integrated circuit (M).
申请人：International Business Machines Corporation
地址：Old Orchard Road Armonk, N.Y. 10504 US
国籍：US
代理机构：Lindner-Vogt, Karin, Dipl.-Phys.
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